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ISSN: 2582-8266 (Online)  || UGC Compliant Journal || Google Indexed || Impact Factor: 9.48 || Crossref DOI

Fast Publication within 2 days || Low Article Processing charges || Peer reviewed and Referred Journal

Research and review articles are invited for publication in Volume 18, Issue 2 (February 2026).... Submit articles

AI-driven verification: Augmenting engineers in semiconductor EDA workflows

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  • AI-driven verification: Augmenting engineers in semiconductor EDA workflows

Siddharth Ravikumar *

Santa Clara University, USA.

Review Article

World Journal of Advanced Engineering Technology and Sciences, 2025, 15(02), 223-230

Article DOI: 10.30574/wjaets.2025.15.2.0424

DOI url: https://doi.org/10.30574/wjaets.2025.15.2.0424

Received on 22 March 2025; revised on 30 April 2025; accepted on 02 May 2025

The semiconductor industry faces mounting verification challenges as chip designs grow increasingly complex, with process nodes shrinking and design elements multiplying. AI-driven verification emerges as a transformative solution, creating a symbiosis between human expertise and machine intelligence rather than replacing engineers. This article explores how AI technologies augment verification workflows through predictive models for testbench generation, advanced anomaly detection systems, and collaborative human-machine partnerships. These innovations enable verification teams to navigate complexity with greater precision while reducing time-to-market pressures. Despite significant technical challenges and organizational hurdles, the trajectory toward AI-augmented verification is clear, requiring not just technological adaptation but a cultural shift in how organizations approach verification processes and engineer roles in the semiconductor ecosystem.

AI-Augmented Verification; Semiconductor Design Automation; Testbench Generation; Anomaly Detection; Human-Machine Collaboration

https://wjaets.com/sites/default/files/fulltext_pdf/WJAETS-2025-0424.pdf

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Siddharth Ravikumar. AI-driven verification: Augmenting engineers in semiconductor EDA workflows. World Journal of Advanced Engineering Technology and Sciences, 2025, 15(02), 223-230. Article DOI: https://doi.org/10.30574/wjaets.2025.15.2.0424.

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